EMC/EMI Checklist Before Your Board Goes to Certification

EMC testing is expensive, and failing it is worse than the test fee — it costs you a respin, a schedule slip, and a second trip to the lab. The frustrating part is that the majority of EMC failures are not caused by exotic physics. They are caused by layout decisions that could have been made correctly the first time, by applying a checklist before the board was fabricated.

This is that checklist. It is organized around the things that actually cause most EMC failures on real boards, with a focus on what you can check without a lab.

First, understand where emissions come from

EMI is rarely about the signal you intended to send. It is about the return current that came along for the ride, and the loop areas those currents flow in. Every current has a return path, and if that path is not the one directly beneath the trace, the resulting loop acts as an antenna. Large, poorly controlled loops radiate; small, tight loops do not.

With that in mind, the checklist is mostly about controlling return paths and isolating the noisy parts of the design from the sensitive parts.

Grounding and return paths

This is the foundation. Get it right and most other problems shrink.

• Every high-speed signal has a continuous reference plane directly beneath it along its entire length.
• No signal crosses a plane split or a gap in its return path.
• Return vias are placed next to signal vias for high-speed signals, so the return current can follow the signal between layers.
• The ground plane is stitched generously, especially around the board edges and between ground regions.
• Connector grounds are connected to the plane with low impedance, not through a single thin trace.

Partitioning and layout topology

Keep noise sources and sensitive circuits physically apart.

• Switching regulators, motor drivers, and other high-dv/dt or di/dt sources are grouped and placed away from sensitive circuits.
• Clock and oscillator circuits are kept short, guarded, and away from board edges and connectors.
• Analog and RF sections are partitioned from digital noise, with ground treatment planned deliberately.
• Cables and connectors that leave the board are kept away from fast-switching nodes.

Filtering and protection at the interfaces

Interfaces are where emissions enter and leave the board, so they get special attention.

• Every external interface has appropriate filtering, sized for the frequencies involved.
• ESD and transient protection is placed as close to the connector as physically possible, with short, direct paths to ground.
• Common-mode chokes or filters are used on cables that are known to radiate or receive.
• Filter ground connections are short and low-impedance; a filter with a long ground path is ineffective.

Clock and switching signals

Fast edges are the source of most emissions.

• Unnecessarily fast edges are slowed where the design allows (series termination, slew-rate control).
• Series termination resistors are placed close to the driver, not the receiver.
• Clock traces are kept short, referenced to ground, and routed away from I/O and connectors.
• Switching supplies use tight loops between the switch node, inductor, and capacitor, with small loop area.
• The switching node copper is minimized — it is a dv/dt radiator.

Power integrity

Noise on the power rails couples into everything.

• Decoupling is placed close to each pin it serves, with short loop areas.
• Bulk and local decoupling are both present and correctly placed.
• Power planes, if used, are paired with adjacent ground planes to reduce loop area.
• Ferrite beads or filters are used deliberately, not as a reflex, and their placement is correct.

Cabling and the enclosure

EMC is not only the board.

• Cable lengths and routing are considered as part of the emission path; cables act as antennas.
• The enclosure, if conductive or coated, has a plan for ground bonding and seams.
• Grounding points to the enclosure, if any, are planned rather than improvised.
• The mechanical stackup does not place sensitive circuits directly against noisy ones through a shared plane.

Pre-test, if you can

You do not need a full lab to catch many problems. If you have any access to a spectrum analyzer and a near-field probe, a pre-scan can find the worst offenders before you pay for formal testing. Even a rough scan identifies the frequencies where your board is loudest, which tells you which part of the design to fix.

For products with radios, pre-test the antenna performance in the real enclosure. The antenna's behavior changes once it is in the product, and finding that out at the certification lab is expensive.

What to do if you fail

If a board does fail, the fix is almost always one of these: improve the return path, tighten a loop area, add or relocate filtering, slow an edge, or improve grounding. Work from the loudest frequency back to its source. In our experience, the majority of failures trace to one or two specific decisions, not a globally bad design.

The good news is that the same checklist that prevents failures also guides the fixes, because the mechanisms are the same.

A note on when to involve EMC early

If your product is going to a regulated market, involve EMC thinking at the layout stage, not after. The design decisions that make certification easy or hard are made in the layout, and retrofitting them onto a finished board is far more expensive than building them in. A board designed with these questions in mind usually passes with minor adjustments; a board designed without them often needs a respin.

The short version

Most EMC failures are decided in the layout. The main mechanism is uncontrolled return current and large loop areas, so the checklist centers on continuous reference planes, return vias, and tight loops. Group noisy circuits away from sensitive ones, filter and protect at every interface, slow unnecessarily fast edges at the driver, keep switching loops small, and place decoupling properly. Pre-test if you can, especially antenna performance in the real enclosure.

And involve EMC thinking at the layout stage, because that is where certification is won or lost.

Where we fit

We lay out boards with EMC and certification in mind from the first placement, rather than treating it as a post-fabrication problem.

If your product has a certification target, that should shape the layout from day one, and that is how we work: pcb-layout for layout, pcb-design for full design from schematic to Gerbers, and PCB PCBA order online when it is time to build.

Tell us your certification target and we will design toward it, not around it.